Trainable neuromorphic spintronic hardware Via analog finite-difference gradient methods.

Area of Science:

• Spintronics
• Artificial Intelligence
• Neuromorphic Computing

Background:

• Spintronic nano-neurons offer potential for energy-efficient hardware neural networks.
• Training spintronic neural networks is challenging due to simplified models and device variability.

Purpose of the Study:

• To develop a hardware architecture for on-device gradient generation in spintronic neural networks.
• To enable reliable and efficient training of spintronic neural networks despite device variability.

Main Methods:

• Theoretical and experimental demonstration of tunable nonlinear responses in magnetic tunnel junctions.
• Implementation of an analog finite-difference approach for on-chip training.
• Device-in-the-loop backpropagation in a magnetic tunnel junction-based neural network.

Main Results:

• Achieved 93.3% classification accuracy in a spintronic neural network with one and two hidden layers.
• Demonstrated close matching between on-chip generated gradients and numerical values without computational overhead.
• Physical simulations confirmed scalability for deep architectures.

Conclusions:

• The proposed architecture enables reliable, trainable, and fully analog spintronic neural networks.
• This work paves the way for next-generation energy-efficient AI hardware.
• On-device gradient generation overcomes key limitations in spintronic neural network training.