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Published on: October 23, 2018
Selective Defect Engineering for Gate-Controlled yet Contact-Transparent Bi2O2Se Transistors
Huynh-Uyen-Phuong Nguyen1, Tai-Ting Lee2,3, Yu-Wei Chang2
1College of Semiconductor Research, National Tsing Hua University, Hsinchu 30013, Taiwan.
Engineers developed a defect-engineering strategy for two-dimensional semiconductors. This method improves gate control and contact resistance in bismuth oxyselenide transistors, enabling high-performance electronics.
Area of Science:
- Materials Science
- Condensed Matter Physics
- Nanotechnology
Background:
- Two-dimensional (2D) semiconductors are crucial for ultrascaled electronics.
- A key challenge is balancing strong gate control with low-resistance contacts.
- Bismuth oxyselenide (Bi2O2Se) is a promising 2D material with intrinsic self-doping issues.
Purpose of the Study:
- To address the gate-contact trade-off in Bi2O2Se transistors.
- To develop a selective defect-engineering strategy for improved device performance.
- To enable precise carrier-density modulation and enhance device functionality.
Main Methods:
- Low-temperature nitrogen incorporation to passivate selenium vacancies.
- Density Functional Theory (DFT) calculations.
- Scanning Tunneling Spectroscopy (STS).
- Fabrication and characterization of Bi2O2Se field-effect transistors.
Main Results:
- Nitrogen incorporation passivates selenium vacancies via N-Bi bonding, suppressing self-doping.
- Nitrogen acts as an acceptor-like dopant, neutralizing vacancy-induced donor states.
- Fermi level shifts toward midgap, allowing precise carrier modulation and band-like transport.
- Spatially confined nitrogen incorporation converts transistors to enhancement mode.
- Achieved high electron mobility and on/off ratios up to 10^9 with ohmic contacts.
Conclusions:
- Selective defect engineering decouples channel electrostatics from contact properties.
- This approach offers a scalable and thermally stable route for 2D transistors.
- Enables gate-controllable, contact-transparent 2D transistors for integrated logic circuits.
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