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MOS Capacitor

MOS Capacitor

A Metal-Oxide-Semiconductor (MOS) capacitor is a fundamental structure used extensively in semiconductor device technology, particularly in the fabrication of integrated circuits and MOSFETs (metal-oxide-semiconductor field-effect transistors). The MOS capacitor consists of three layers: a metal gate, a dielectric oxide, and a semiconductor substrate.
The metal gate is typically made from highly conductive materials such as aluminum or polysilicon. Beneath the metal gate lies a thin layer of...

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Updated: May 28, 2026

High Throughput Microfluidic Rapid and Low Cost Prototyping Packaging Methods

High Throughput Microfluidic Rapid and Low Cost Prototyping Packaging Methods

Published on: December 23, 2013

A Rapid-prototyping CMOS-RRAM Integration Strategy.

Andreas Tsiamis¹, Spyros Stathopoulos², Themis Prodromakis²

¹Centre for Electronics Frontiers, Institute for Integrated Micro and Nano Systems, School of Engineering, The University of Edinburgh, Edinburgh, UK. a.tsiamis@ed.ac.uk.

Microsystems & Nanoengineering

|May 26, 2026

Summary

This summary is machine-generated.

Beyond Moore

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Last Updated: May 28, 2026

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Area of Science:

Semiconductor technology
Materials science
Electrical engineering

Background:

Moore's Law faces scaling limitations, necessitating a 'beyond Moore' approach.
Resistive random-access memories (RRAM) offer innovative solutions for next-generation electronics.
Integrating RRAM with complementary metal oxide semiconductors (CMOS) presents manufacturing and complexity challenges.

Purpose of the Study:

To present a cost-effective, rapid-prototyping, and technology-agnostic integration strategy for CMOS-RRAM.
To detail a systematic approach for combining RRAM with mature CMOS fabrication processes.
To facilitate the transition from RRAM research and development to volume production.

Main Methods:

Hybridized wafer-level and multi-reticle processing techniques for CMOS-RRAM integration.
Leveraging mature front-end-of-line (FEOL) fabrication processes from semiconductor foundries.
Establishing an in-house RRAM development program for custom CMOS electronics integration.

Main Results:

A scalable and power-efficient CMOS-RRAM integration strategy is detailed.
The approach utilizes fully CMOS-compatible and transferable processes.
Demonstrates a method for combining material/device-level RRAM knowledge with custom CMOS.

Conclusions:

The proposed integration strategy overcomes challenges in fusing emerging and established semiconductor technologies.
This method enables seamless RRAM integration, supporting both memory and computation.
Facilitates a smooth transition from R&D to volume production for advanced electronics.