Design of a Compact Two-Stage ADC Based on a Nonuniform Flash Architecture for NTC Thermistor Linearization

This paper proposes a compact two-stage analog-to-digital converter (ADC), leveraging a nonuniform flash ADC to address sensor linearization challenges. The proposed approach reduces circuit complexity in conventional two-stage linearizing ADCs while preserving overall resolution and effective nonlinearity reduction. The compactness of the proposed two-stage ADC is achieved by reducing the number of comparators in the nonuniform flash ADC and reusing the same flash ADC across both conversion stages. Consequently, the total number of comparators is reduced by nearly 75%, while the number of resistors is reduced by 50% compared to a conventional two-stage ADC having the identical resolutions in both stages as the proposed architecture. Nonuniform quantization is implemented using a reference resistor ladder with different resistance values, generating quantization levels that approximate the inverse of the nonlinear input signal and perform linearization. Performance of the proposed two-stage ADC is evaluated through LabVIEW simulations using a Negative Temperature Coefficient (NTC) thermistor (Vishay NTCLE428E3103F400L) as a case study. Results demonstrate a reduction in measurement error from 1 °C to 0.0033 °C in the range from -20 °C to 60 °C, achieving an overall resolution of 20 bits using a 10-bit nonuniform flash ADC.