Demonstrating real-time and low-latency quantum error correction with superconducting qubits

Quantum error correction will be essential for quantum computers to realise their full potential. As quantum computers advance towards demonstrating a universal fault-tolerant logical gate set, implementing scalable and low-latency real-time decoding will be crucial to avoid an exponential slowdown and maintain a fast logical clock rate. Here, we demonstrate low-latency feedback with a scalable FPGA decoder integrated into the control system of a superconducting quantum processor. We perform an 8-qubit stability experiment with up to 25 decoding rounds and a sub-microsecond mean decoding time per round, providing strong evidence that the backlog problem will be avoided when the decoder is operated as a streaming decoder on a superconducting hardware with the strictest speed requirements. We observe logical error suppression as the number of decoding rounds is increased. We also implement and time a fast-feedback experiment demonstrating a decoding response time of 9.6 μs for a total of 9 measurement rounds.