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Updated: Jun 4, 2026

Optimized Fabrication Procedure for High-Quality Graphene-based Moiré Superlattice Devices
Published on: July 11, 2025
Room-temperature multistage metastability in a moiré superstructure
Baiqing Lv1,2, Yifan Su2, Alfred Zong2,3,4
1Tsung-Dao Lee Institute, School of Physics and Astronomy, Shanghai Jiao Tong University, Shanghai, China.
Abstract:
Charge density waves (CDWs) offer versatile platforms for accessing metastable states due to their sensitivity to external stimuli. However, most metastable CDW states are stabilized only at low temperatures, limiting their practical utility. In this study, we report the observation of electrically driven, room-temperature, nonvolatile metastable states in the bulk form of EuTe4, a recently discovered compound that hosts an innate moiré superlattice characterized by the stacking of incommensurate monolayer and bilayer CDWs. Systematic transport measurements reveal discrete resistivity plateaus and strong electric-field sensitivity, with a large number of metastable states readily induced across a wide temperature window within a giant hysteresis loop, making them well-suited for high-temperature, multi-bit memory applications. By integrating photoemission spectroscopy, diffraction, and in-situ transport measurements, we uncover that these metastable states are characterized by a suppression of the original CDW amplitude and a reduction in correlation length, pointing to a unique electric-field-induced switching of out-of-plane CDW phases in the moiré superstructure. Our findings provide critical insights into metastable phenomena in moiré systems with stacked electronic orders and establish EuTe4 as a promising platform for developing room-temperature, multi-bit memory devices.
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