Exploring Spatial Distribution of Intrinsic Oxide Trap by Decoupling Channel Thickness Effects in Amorphous IGZO TFTs

Area of Science:

• Materials Science
• Semiconductor Physics
• Device Engineering

Background:

• Amorphous Indium-Gallium-Zinc-Oxide (IGZO) thin-film transistors (TFTs) are crucial for modern electronics.
• Scaling down channel thickness in IGZO TFTs leads to increased 1/f noise and subgap density of states (DOS).
• Conventional low-frequency noise (LFN) analysis can overestimate oxide trap density (N_ot) due to bulk defect contributions.

Purpose of the Study:

• To develop an integrated approach for accurately extracting intrinsic oxide trap density (N_ot,int) in IGZO TFTs.
• To address the overestimation of N_ot caused by bulk defect-induced noise in scaled devices.
• To provide a quantitative framework for understanding the spatial distribution of oxide traps.

Main Methods:

• Combining low-frequency noise (LFN) measurements with sub-bandgap optical excitation (450 nm).
• Introducing a compensated volume factor (V_f) to suppress bulk trap contributions.
• Analyzing carrier trapping and detrapping effects within the Debye screening length (L_D).

Main Results:

• A pronounced increase in 1/f noise and DOS was observed as channel thickness decreased from 30 to 3 nm.
• The proposed method corrected N_ot values, reducing overestimations from 2.1 × 10^19 to 1.4 × 10^19 eV⁻¹ cm⁻³ (30 nm), 1.2 × 10^20 to 1.3 × 10^19 eV⁻¹ cm⁻³ (10 nm), and 3.1 × 10^20 to 1.3 × 10^19 eV⁻¹ cm⁻³ (3 nm).
• Extracted trap distribution was found within 1.4-1.9 nm from the interface, separating bulk and interface effects.

Conclusions:

• The methodology accurately separates interface trapping from bulk noise contributions in IGZO TFTs.
• This approach provides a quantitative framework for optimizing gate stacks and interfaces in scaled devices.
• The method is extendable to other oxide semiconductor systems for enhanced performance and reliability.