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Updated: Jun 13, 2026

Nanofabrication of Gate-defined GaAs/AlGaAs Lateral Quantum Dots
Published on: November 1, 2013
Design and temperature assessment of analog/RF and linearity parameters on dual material gate junctionless FinFET at
1Department of Computer Science and Engineering, Vignan's Foundation for Science Technology and Research, Guntur, Andhra Pradesh, India. ksrk73@gmail.com.
Abstract:
The dual-material gate junctionless FinFET (DMG JLFinFET) has emerged as a promising device in semiconductor technology due to its enhanced capability to suppress short-channel effects (SCEs). This work presents a comprehensive study on how temperature variations affect the electrical behavior of DMG JLFinFETs, particularly for devices scaled to the 7 nm technology node. Essential DC parameters-such as subthreshold swing (SS), drain-induced barrier lowering (DIBL), and the ION/IOFF ratio-were evaluated over a temperature span of 200 to 400 K. In addition, the study examines how temperature impacts key analog and radio frequency (RF) parameters, including gate-to-drain capacitance (Cgd), gate-to-source capacitance (Cgs), total gate capacitance (Cgg), transconductance (gm), cutoff frequency (ft), transconductance generation factor (TGF), intrinsic delay (τ), gain-bandwidth product (GBW), and transconductance frequency product (TFP). The investigation also addresses how thermal conditions influence linearity performance, focusing on metrics such as second-order transconductance (gm2), third-order transconductance (gm3), voltage intercept points (VIP2, VIP3), third-order input intercept point (IIP3), and the 1 dB compression point. The findings of this investigation demonstrate that the DMG JLFinFET exhibits promising electrical, analog, and RF performance characteristics, making it a viable candidate for advanced communication applications.
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