Related Experiment Video
Updated: Jun 25, 2026

Residue-Free Fabrication of van der Waals Heterostructures of Two-Dimensional Materials
Published on: July 18, 2025
Interdiffusion at the Molybdenum-TEOS Interface in Flat and Nanostructured Systems during Graphene CVD
S Zappalà1,2, M Scuderi1, S Mirabella3
1Consiglio Nazionale delle Ricerche - Istituto per la Microelettronica e Microsistemi (CNR-IMM), Z.I. VIII Strada, 5, Catania 95121, Italy.
Abstract:
The integration of graphene with metallic layers provides a versatile platform for hybrid materials in electronic and optical technologies. Here, we investigate interdiffusion phenomena at the molybdenum-tetraethyl orthosilicate (TEOS)-derived SiO2 interface during graphene growth by chemical vapor deposition (CVD). Graphene was grown on a 35 nm thick continuous sputtered molybdenum film and on nanostructured molybdenum patterns defined by electron beam lithography, both supported on a 1.6 μm thick TEOS-derived SiO2 layer. The samples were characterized by Rutherford backscattering spectrometry, secondary ion mass spectrometry, X-ray diffraction, and scanning and transmission electron microscopy. On the flat molybdenum film, the CVD process leads to the formation of Mo-Si and Mo-C phases and to the growth of approximately 15 graphene layers. In contrast, nanostructured molybdenum undergoes solid-state dewetting, resulting in morphological instability and the formation of only about 5 graphene layers. These results demonstrate that catalyst geometry critically influences graphene thickness: interdiffusion is predominantly unidirectional in planar films, whereas it becomes multidirectional in confined nanostructures, leading to partial carbon loss and enhanced silicon incorporation. The loss of structural homogeneity below a critical lateral dimension highlights the key role of interfacial diffusion and surface morphology in controlling graphene growth on metal-oxide substrates.
More Related Videos
08:12Ohmic Contact Fabrication Using a Focused-ion Beam Technique and Electrical Characterization for Layer Semiconductor Nanostructures
Published on: December 5, 2015
08:50Preparation of Large-area Vertical 2D Crystal Hetero-structures Through the Sulfurization of Transition Metal Films for Device Fabrication
Published on: November 28, 2017