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Related Experiment Video

Updated: Jul 1, 2026

Design and Analysis for Fall Detection System Simplification
08:05

Design and Analysis for Fall Detection System Simplification

Published on: April 6, 2020

Design and Implementation of a Field Programmable Gate Array-Based Pedestrian Detection Framework for Autonomous

Isha Gupta1, Deepti Prit Kaur2

  • 1Chitkara University Institute of Engineering and Technology, Chitkara University; isha1402ece.phd21@chitkara.edu.in.

Journal of Visualized Experiments : Jove
|June 29, 2026
PubMed
Summary
This summary is machine-generated.

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This study introduces a real-time pedestrian detection system for autonomous vehicles using an FPGA. The developed system achieves high accuracy, enhancing road safety.

Area of Science:

  • Computer Vision
  • Embedded Systems
  • Artificial Intelligence

Background:

  • Traffic accidents remain a significant public health concern, driving the need for advanced autonomous driving systems.
  • Real-time pedestrian detection is a critical yet challenging component for the safety and functionality of self-driving cars.
  • Existing methods face difficulties due to variations in pedestrian appearance, occlusion, and environmental conditions.

Purpose of the Study:

  • To develop and evaluate a real-time pedestrian detection system for autonomous vehicles.
  • To implement the system on an Field Programmable Gate Array (FPGA) hardware platform, specifically the Ultra 96 v2 board.
  • To leverage High-Level Synthesis (HLS) tools for efficient hardware implementation.

Main Methods:

Related Experiment Videos

Last Updated: Jul 1, 2026

Design and Analysis for Fall Detection System Simplification
08:05

Design and Analysis for Fall Detection System Simplification

Published on: April 6, 2020

  • Pedestrian detection using Histogram of Oriented Gradients (HOG) features.
  • Classification of detected pedestrians with a Support Vector Machine (SVM) classifier.
  • Hardware implementation and optimization on the Ultra 96 v2 FPGA using HLS tools.

    • Main Results:

    • The system achieved a pedestrian detection accuracy close to 95%.
    • Performance metrics include precision (78.6%), recall (88.3%), and F1 Score (83.1%).
    • The system operates efficiently at 150 MHz, consuming approximately 2.5 W and utilizing less than 50% of FPGA resources.

    Conclusions:

    • The developed FPGA-based pedestrian detection system demonstrates high accuracy and efficiency for real-time applications.
    • The Ultra 96 v2 platform offers significant performance improvements for autonomous driving perception tasks.
    • This technology has the potential to enhance the safety and development of intelligent transportation systems.