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Related Concept Videos

MOSFET: Enhancement Mode01:22

MOSFET: Enhancement Mode

Enhancement-mode MOSFETs are pivotal components in electronics, distinguished by their capacity to act as highly efficient switches. They are part of the larger family of metal-oxide Semiconductor Field-Effect Transistors (MOSFETs). They are available in two types: p-channel and n-channel, each tailored to specific polarity operations.
In their basic form, enhancement-mode MOSFETs are typically non-conductive when the gate-source voltage (Vgs) is zero. This default 'off' state means no current...
Characteristics of MOSFET01:17

Characteristics of MOSFET

Metal-oxide-semiconductor field-effect Transistors, or MOSFETs, play a critical role in electronic circuits. They are primarily utilized for amplifying and switching signals.
Various vital parameters influence their functionality, which is crucial for theory and electronics applications. First, channel dimensions, precisely length, and width, are pivotal. The size of these channels affects the transistor's ability to carry current and switching speeds; shorter channels typically enable quicker...
MOSFET: Depletion Mode01:20

MOSFET: Depletion Mode

Depletion-mode MOSFETs represent a unique subset of MOSFET technology, functioning fundamentally differently from their enhancement-mode counterparts. Unlike enhancement MOSFETs, which require a positive gate-source voltage (Vgs) to turn on, depletion-mode MOSFETs are inherently conductive and "normally on" devices.
The primary characteristic of depletion-mode MOSFETs is their ability to conduct current between the drain and source terminals without gate bias. This inherent conductivity arises...
MOSFET01:16

MOSFET

The Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) plays a pivotal role in modern electronics thanks to its versatility and efficiency in controlling electrical currents. This device, also known as IGFET, MISFET, and MOSFET, has three main terminals: the Source, Drain, and Gate. MOSFETs are classified into n-channel or p-channel types based on the doping characteristics of their substrate and the source or drain regions.
In an n-MOSFET, the structure includes n-type source and drain...
Biasing of FET01:22

Biasing of FET

Biasing a Junction Field Effect Transistor (JFET) is crucial for setting operational parameters and ensuring efficient functioning in electronic circuits. JFETs are characterized by using a single carrier type in N-channel or P-channel configurations, where the channel is surrounded by PN junctions. These junctions are central to the device's ability to control current flow.
In an N-channel JFET, the structure consists of N-type material forming the channel on a P-type substrate, with the gate...
Characteristics of JFET01:21

Characteristics of JFET

Junction Field Effect Transistors (JFETs) exhibit specific operational characteristics based on the relationship between the drain current (id) and the drain-source voltage (Vds), along with varying gate-source voltages (Vgs).
The core of a JFET's operation is controlling drain current by modulating the gate-source voltage. When the drain and gate voltage are set to zero, the JFET exhibits no net current flow, representing a state of equilibrium. The drain current increases linearly as the...

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Related Experiment Video

Updated: Jul 2, 2026

Monolayer Contact Doping of Silicon Surfaces and Nanowires Using Organophosphorus Compounds
09:45

Monolayer Contact Doping of Silicon Surfaces and Nanowires Using Organophosphorus Compounds

Published on: December 2, 2013

Outstanding figure-of-merit in SOI-LDMOSFET by a surface groove technique.

Ali Shokouhi Shoormasti1, Abdollah Abbasi1, Ali A Orouji2

  • 1Electrical and Computer Engineering Department, Semnan University, Semnan, Iran.

Scientific Reports
|July 1, 2026
PubMed
Summary

A new surface groove technique significantly improves Silicon-On-Insulator Lateral Double-Diffused Metal-Oxide-Semiconductor Field-Effect Transistors (SOI-LDMOSFETs). This method enhances breakdown characteristics and achieves a 70% figure-of-merit improvement.

Keywords:
Breakdown VoltageFigure-of-meritPower MOSFETSOI LDMOSFET

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Theoretical Calculation and Experimental Verification for Dislocation Reduction in Germanium Epitaxial Layers with Semicylindrical Voids on Silicon
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Theoretical Calculation and Experimental Verification for Dislocation Reduction in Germanium Epitaxial Layers with Semicylindrical Voids on Silicon

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Rendering SiO2/Si Surfaces Omniphobic by Carving Gas-Entrapping Microtextures Comprising Reentrant and Doubly Reentrant Cavities or Pillars
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Rendering SiO2/Si Surfaces Omniphobic by Carving Gas-Entrapping Microtextures Comprising Reentrant and Doubly Reentrant Cavities or Pillars

Published on: February 11, 2020

Related Experiment Videos

Last Updated: Jul 2, 2026

Monolayer Contact Doping of Silicon Surfaces and Nanowires Using Organophosphorus Compounds
09:45

Monolayer Contact Doping of Silicon Surfaces and Nanowires Using Organophosphorus Compounds

Published on: December 2, 2013

Theoretical Calculation and Experimental Verification for Dislocation Reduction in Germanium Epitaxial Layers with Semicylindrical Voids on Silicon
06:57

Theoretical Calculation and Experimental Verification for Dislocation Reduction in Germanium Epitaxial Layers with Semicylindrical Voids on Silicon

Published on: July 17, 2020

Rendering SiO2/Si Surfaces Omniphobic by Carving Gas-Entrapping Microtextures Comprising Reentrant and Doubly Reentrant Cavities or Pillars
08:02

Rendering SiO2/Si Surfaces Omniphobic by Carving Gas-Entrapping Microtextures Comprising Reentrant and Doubly Reentrant Cavities or Pillars

Published on: February 11, 2020

Area of Science:

  • Electrical Engineering
  • Materials Science
  • Semiconductor Physics

Background:

  • Silicon-On-Insulator Lateral Double-Diffused Metal-Oxide-Semiconductor Field-Effect Transistors (SOI-LDMOSFETs) are crucial for power electronics.
  • Localized electric field concentration in the drift region limits device performance and breakdown characteristics.

Purpose of the Study:

  • To introduce a novel surface groove technique for enhancing SOI-LDMOSFET electrical characteristics.
  • To mitigate breakdown susceptibility by optimizing electric field distribution.

Main Methods:

  • Implementation of a surface groove within the drift region of SOI-LDMOSFETs.
  • Utilizing 2D device simulations to analyze electric field redistribution.
  • Conducting figure-of-merit analysis to quantify performance improvements.

Main Results:

  • The proposed Surface Groove SOI-LDMOSFET (SG-SOI-LDMOSFET) demonstrates uniform electric field distribution.
  • Achieved a significant 70% improvement in the figure-of-merit.
  • Demonstrated a peak power density of 4.8 MW/cm2.

Conclusions:

  • The surface groove technique effectively enhances the electrical performance and breakdown characteristics of SOI-LDMOSFETs.
  • The SG-SOI-LDMOSFET offers superior performance without increased fabrication complexity.
  • This technique presents a viable solution for advancing power semiconductor devices.