Compact Single-Transistor Ternary Content-Addressable Memory Based on Parallel-Channel WSe₂ Reconfigurable...

Area of Science:

• Materials Science
• Electrical Engineering
• Computer Engineering

Background:

• Data-centric applications face performance bottlenecks due to memory-logic separation.
• Conventional static random access memory (SRAM)-based ternary content-addressable memory (TCAM) is dense but power-hungry.
• Existing TCAMs require numerous transistors per cell, limiting scalability and increasing power consumption.

Purpose of the Study:

• To present a compact single-transistor TCAM cell.
• To overcome the limitations of conventional SRAM-based TCAMs.
• To enable high-density and fast operation for future data-centric computing.

Main Methods:

• Fabrication of parallel-channel reconfigurable field-effect transistors (PC RFETs) using large-area monolayer WSe2.
• Selective charge-transfer doping of WSe2 to create parallel n-type and p-type channels.
• Utilizing a tri-layer gate stack for nonvolatile modulation of conduction states.
• TCAM cell validation through SPICE simulations and 1x8 array testing.

Main Results:

• Demonstrated stable ambipolar transport in large-area WSe2.
• Achieved symmetric conduction (Ion.n/Ion.p ≈ 1.02) and high on/off ratios (∼10^5).
• Validated reliable match/mismatch behavior in the PC RFETs-based TCAM cell.
• SPICE simulations confirmed scalability and circuit feasibility with ~5 ns latency.

Conclusions:

• The developed single-transistor TCAM cell offers a promising pathway for high-density and fast operation.
• PC RFETs fabricated with WSe2 provide a compact and efficient TCAM solution.
• This technology advancement is crucial for overcoming bottlenecks in future data-centric computing systems.