Low-cost approximate multipliers for quantum-dot cellular automata

Area of Science:

• Nanotechnology
• Digital Systems Engineering
• Computer Arithmetic

Background:

• Quantum-dot Cellular Automata (QCA) offers a promising alternative to CMOS for ultra-low-energy digital systems.
• Designing efficient multipliers in QCA remains a challenge due to layout cost and power dissipation.
• Approximate arithmetic provides a method to reduce area, delay, and energy in exchange for bounded accuracy.

Purpose of the Study:

• To introduce a family of approximate multipliers specifically designed for QCA and majority logic.
• To develop and evaluate novel QCA realizations of approximate multipliers and compressors.
• To demonstrate significant reductions in key performance metrics compared to existing QCA multiplier designs.

Main Methods:

• Boolean-level definition of approximate 2x2 multipliers (6.25% error rate) and 4:2 compressors (15.6% error rate).
• Implementation of two QCA layouts for the 2x2 multiplier: compact coplanar and multilayer.
• Design of a majority-friendly approximate 4:2 compressor in QCA and its application in a 4x4 multiplier.

Main Results:

• The compact 2x2 QCA multiplier reduces cell count, area, and cost by ~69%, ~86.7%, and ~86.7%, respectively, with low energy per operation.
• The approximate 4:2 compressor achieves substantial reductions in cell count (~83%), area (~86.7%), cost (~98.8%), and efficient complexity (~98.1%).
• The 4x4 QCA multiplier demonstrates 94-99% lower cost and 90-99% lower efficient complexity, with over 60% reduction in average energy dissipation.

Conclusions:

• The proposed approximate multipliers offer significant advantages in terms of area, cost, and energy efficiency for QCA-based digital systems.
• The developed QCA designs, particularly the compact coplanar 2x2 multiplier and the approximate 4:2 compressor, represent a notable advancement in QCA multiplier design.
• This work highlights the potential of approximate arithmetic in conjunction with QCA technology for realizing ultra-low-power and high-performance digital circuits.