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Diameter-Controlled Synthesis of Horizontally Aligned Carbon Nanotube Arrays via S-Apphire Interface Engineering
Jianping Wang1,2, Zijian Wang2, Chengyu Wang3
1Beijing National Laboratory for Molecular Sciences, College of Chemistry and Molecular Engineering, Peking University, Beijing100871, China.
Journal of the American Chemical Society
|July 21, 2026
Summary
Interface engineering using sulfur modification precisely controls metal nanoparticle size for advanced carbon nanotube (CNT) electronics. This method enables predictable diameter reduction, crucial for high-performance integrated circuits.
Area of Science:
- Materials Science
- Nanotechnology
- Catalysis
Background:
- Controlling supported metal nanoparticle size and dispersion is vital for catalysis and electronics.
- Sintering at high temperatures challenges precise size regulation.
- Catalyst size directly impacts carbon nanotube (CNT) diameter and electronic properties.
Purpose of the Study:
- To develop a deterministic interface engineering strategy for controlling nanoparticle size and CNT diameter.
- To establish a quantitative descriptor for metal-metal and metal-support interactions.
- To enable the fabrication of CNTs meeting specific diameter requirements for integrated circuits.
Main Methods:
- Interface engineering using a sulfur-modified sapphire (S-apphire) substrate.
- Utilizing cohesive energy (E_coh) as a descriptor for metal-support interactions.
- Employing Ti catalysts for horizontally aligned carbon nanotube (HACNT) array growth.
Main Results:
- Achieved predictable reduction in catalyst nanoparticle diameter to ~1.26 nm.
- Demonstrated successful growth of HACNT arrays with controlled diameters for the 3 nm technology node.
- Fabricated top-gated field-effect transistors with on/off current ratios approaching 10^7.
Conclusions:
- Sulfur modification of sapphire provides a tunable interface for precise nanoparticle size control.
- This strategy offers a generalizable thermodynamic framework for designing stable, size-controlled metal nanostructures.
- The developed method significantly enhances the performance of CNT-based integrated circuits.
