A configurable streaming spiking neural network accelerator with decoupled pixel-level and output-channel parallelism...

Area of Science:

• Hardware accelerators
• Spiking Neural Networks (SNNs)
• Edge computing

Background:

• Streaming SNN accelerators are crucial for low-latency edge inference.
• Current accelerators often compromise on router-free dataflow, sparsity exploitation, or configurable parallelism.
• This limits their efficiency on heterogeneous workloads like automatic modulation classification (AMC).

Purpose of the Study:

• To present a novel configurable streaming SNN accelerator.
• To achieve router-free dataflow, joint sparsity exploitation, and adaptable parallelism simultaneously.
• To enable efficient mapping across heterogeneous layers and hardware budgets.

Main Methods:

• Decoupled pixel-level and output-channel parallelism.
• Implemented a weight-priority gated one-to-all product (GOAP) dataflow.
• Utilized deterministic offline scheduling for router-free streaming and sparsity exploitation.
• Deployed on a Xilinx Virtex-7 FPGA, evaluated with RadioML datasets.

Main Results:

• Achieved simultaneous router-free dataflow, sparsity exploitation, and configurable parallelism.
• Configurable parallelism enabled effective layer-wise latency balancing and hardware savings.
• Sustained high throughput and classification accuracy across various sparsity and quantization settings.
• Demonstrated retargetability across a wide range of hardware costs.

Conclusions:

• The proposed configurable streaming SNN accelerator meets all key efficiency properties.
• It offers significant hardware-resource savings and layer-wise latency balancing.
• This architecture is a key enabler for large-scale SNN deployment on diverse edge platforms.