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NbOx Mott Memristor-Based Oscillatory P-trit for Ternary Potts Machine
Hakseung Rhee1, Seoeun Jang2, Tae Wook Go1
1Department of Materials Science and Engineering, Korea Advanced Institute of Science and Technology (KAIST), Daejeon, Republic of Korea.
Advanced Science (Weinheim, Baden-Wurttemberg, Germany)
|July 27, 2026
Summary
This study introduces probabilistic ternary computing using novel p-trits for complex problems. Ternary Potts machines demonstrate higher accuracy and lower computational overhead than binary systems.
Area of Science:
- Materials Science
- Computer Science
- Physics
Background:
- Probabilistic computing leverages stochastic dynamics for optimization and inference.
- Current hardware often uses binary probabilistic bits (p-bits), limiting efficiency for multi-class problems.
Purpose of the Study:
- To propose and demonstrate a ternary Potts machine (TPM) using probabilistic ternary digit units (p-trits).
- To overcome the limitations of binary systems in probabilistic computing for complex, multi-class problems.
Main Methods:
- Developed a p-trit based on NbOₓ oscillator's electro-thermal dynamics and threshold-switching memristor.
- Implemented a compact circuit to digitize oscillatory signals into two-bit outputs for practical p-trit operation.
- Integrated the p-trit into a microcontroller unit-based TPM prototype for experimental validation.
Main Results:
- Achieved a practical p-trit operation rate of 2.5 µs/bit with 2.4 nJ/bit energy consumption.
- The TPM prototype solved Max-3-Cut problems with ~30% higher accuracy than p-bit systems.
- TPM required ~33% of the computational overhead compared to p-bit computing.
- Simulations showed robust convergence up to 99.96% for weighted ternary number partitioning.
Conclusions:
- The proposed p-trit and TPM offer a more efficient approach for probabilistic computing, especially for multi-class problems.
- Experimental results validate the enhanced accuracy and reduced computational cost of ternary probabilistic computing.
- This work paves the way for advanced hardware implementations in optimization and inference.
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