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Edge CA-CFAR Data Reduction for Bandwidth-Efficient Real-Time Wideband Spectrum Sensing on Low-Cost SDRs
Yunsu Bae1, Hajung Lee1, Hyojun Park1
1Department of Electrical Engineering, Kookmin University, Seoul 02707, Republic of Korea.
Sensors (Basel, Switzerland)
|July 28, 2026
Summary
This study introduces an FPGA-GPU architecture for efficient wideband radio frequency (RF) spectrum monitoring, crucial for drone detection. The system significantly reduces data transfer and processing time on low-cost software-defined radio (SDR) platforms.
Area of Science:
- Electrical Engineering
- Computer Engineering
- Signal Processing
Background:
- Real-time wideband radio frequency (RF) spectrum monitoring is vital for applications like unmanned aerial vehicle (UAV) detection and RF surveillance.
- Low-cost software-defined radio (SDR) networks face challenges including limited bandwidth, data transfer bottlenecks, and computational demands.
- Existing SDR limitations hinder effective wideband RF monitoring in resource-constrained environments.
Purpose of the Study:
- To propose and evaluate a bandwidth-efficient FPGA-GPU heterogeneous architecture for real-time wideband RF spectrum monitoring.
- To address the limitations of low-cost SDR networks in terms of bandwidth, data transfer, and processing overhead.
- To enable effective RF surveillance and UAV detection using enhanced SDR platforms.
Main Methods:
- Developed a hardware-efficient cell-averaging constant false alarm rate (CA-CFAR) IP core for edge FPGAs in SDR nodes.
- Implemented a GPU-accelerated pipeline for real-time stitching and processing of spectra from multiple SDR nodes.
- Utilized a heterogeneous architecture combining FPGAs for edge processing and GPUs for intensive computation.
Main Results:
- Achieved an 88% reduction in data transfer volume at a 10% duty cycle.
- Demonstrated a low latency of 376 μs from signal acquisition to display-buffer preparation.
- Reported a high detection probability of 96.26% and a 4.5× to 6.0× GPU speedup over CPU processing.
- The CA-CFAR IP core showed efficient resource utilization on the FPGA (16.3% LUTs) with minimal latency.
Conclusions:
- The proposed FPGA-GPU architecture effectively overcomes the limitations of low-cost SDRs for real-time wideband RF monitoring.
- This approach enables efficient RF surveillance and UAV detection on resource-constrained platforms.
- The system offers significant improvements in data transfer efficiency, processing speed, and detection accuracy.
