System-Level Integration and Evaluation of an APS-SoC-Based Electrical Resistance Tomography Measurement System

Area of Science:

• Electrical Engineering
• Measurement Science
• Image Reconstruction

Background:

• Electrical Resistance Tomography (ERT) is a valuable imaging technique.
• Existing ERT platforms face limitations in speed and signal quality.
• System-level optimization is crucial for advancing ERT capabilities.

Purpose of the Study:

• To present and evaluate a system-level optimized ERT measurement platform.
• To leverage a ZYNQ-7020 all-programmable system-on-chip (APS-SoC) for enhanced performance.
• To improve frame rate, reduce latency, and enhance signal quality in ERT.

Main Methods:

• Integrated programmable-logic (PL) acquisition and processing-system (PS) configuration on a ZYNQ-7020 APS-SoC.
• Implemented AXI/DMA data movement and Gigabit Ethernet transmission.
• Utilized a seventh-order Butterworth excitation filter for signal generation.
• Maintained FFT-based amplitude extraction and Tikhonov reconstruction on a host computer for consistent algorithm comparison.

Main Results:

• Achieved an average frame rate increase from 58.23 FPS to 123.02 FPS.
• Reduced end-to-end latency from 5.2 ms to 2.1 ms.
• Improved Spurious-Free Dynamic Range (SFDR) from 68 dB to 95 dB and Structural Similarity Index Measure (SSIM) from 0.72 to 0.94.
• Enhanced amplitude-stability Signal-to-Noise Ratio (SNR) from 65 dB to 100 dB and decreased total harmonic distortion from 15.2% to 7.5%.

Conclusions:

• The system-level optimization significantly enhances ERT measurement platform performance.
• The ZYNQ-7020 APS-SoC integration enables substantial improvements in speed and data quality.
• Further development could lead to fully standalone smart ERT sensors.