Efficient Automatic Design of a 2D TMD FET via Machine Learning-Assisted TCAD Simulation

As the scaling of silicon-based devices approaches physical limits, two-dimensional transition-metal dichalcogenide field-effect transistors (2D TMD FETs) have emerged as promising candidates for logic devices in the post-Moore era. However, their design optimization relies heavily on computationally intensive TCAD simulations, thereby limiting efficient exploration of multidimensional parameter spaces. This paper proposes an efficient automated design framework for 2D TMD FETs under small-sample conditions and validates it using a monolayer MoS₂ FET as a case study. The framework integrates device design, physics-based simulation, performance prediction, and inverse design, establishing a bidirectional mapping between device parameters and electrical performance. Target-driven closed-loop optimization is achieved through TCAD-based feedback validation. Results demonstrate that, using a dataset comprising 300 TCAD samples, the forward model achieves an average coefficient of determination (R2) of 0.9503. TCAD revalidation of the inverse-designed devices yields an average mean absolute error (MAE) of 0.0464 and an average mean absolute percentage error (MAPE) of 5.46% for performance metrics. Regarding computational efficiency, while a single TCAD simulation takes approximately 25 to 50 min, the trained model performs inference in under 50 ms, achieving a speedup of at least 3×104 during the inference phase. Accounting for the generation of the 300 TCAD samples and the training of both forward and inverse models, the framework's one-time computational cost ranges from 160.27 to 285.27 h. Once the cumulative number of design tasks exceeds approximately 342 to 385, the total computational cost falls below that of direct TCAD simulation, with the computational advantage becoming increasingly significant as the number of tasks grows. Consequently, this method is highly suitable for large-scale parameter sweeps, device screening, and multi-objective, high-frequency design iterations. It drastically reduces repetitive TCAD calls, offering a scalable solution for the efficient, automated design of 2D TMD FETs.