Answer-locked ERP dynamics during arithmetic verification in children with developmental dyscalculia

Children with developmental dyscalculia (DD) show persistent difficulties in arithmetic, yet the temporal characteristics of neural processing after the presentation of a proposed answer remain insufficiently understood. This study used an answer-locked event-related potential (ERP) design to examine neural dynamics during arithmetic verification in 76 children aged 8-12 years, including 37 children with DD and 39 typically developing (TD) children. Participants completed addition, subtraction, and multiplication verification problems while electroencephalography was recorded. Peak amplitude and peak latency of the N2a, N2b, and P3 components were measured at Fz and Cz. Component-specific analyses were complemented by omnibus models across ERP components and electrodes, and Holm correction was applied to control for multiple comparisons. Children with DD showed substantially lower accuracy and longer reaction times than TD children. After correction, the DD group showed longer N2a peak latencies at Fz and Cz, longer N2b peak latency at Fz, and smaller P3 peak amplitude at Fz. The surviving ERP effects were moderate to large in statistical magnitude, and omnibus analyses further indicated that the pattern of group differences varied across components and electrodes. By time-locking neural activity to proposed-answer onset, these findings delineate a robust pattern of delayed N2 responses and reduced later frontal P3 amplitude in DD, clarifying when group differences emerge during arithmetic verification. These findings characterize group-level differences in answer-related neural processing but do not isolate the contributions of calculation and verification-related demands.