Monolithic 3D integration of atomic-layer-deposited oxide semiconductors on 200-mm silicon wafers

Monolithic 3D (M3D) integration offers a pathway to overcome the scaling limits of conventional silicon complementary metal-oxide-semiconductor technology by extending dense vertical stacking of multifunctional logic and memory devices. Here we demonstrate wafer-scale M3D integration of three tiers of atomic-layer-deposited indium oxide (InO_x)-based devices (>100,000 fabricated), including ferroelectric, enhancement-mode and depletion-mode field-effect transistors, on 200-mm silicon wafers. We achieve threshold voltage standard deviations as low as 0.04 V, average electron mobilities of up to 91.6 cm² V^-1 s^-1 and fully functional cross-tier circuits. A four-tier 3D computing-in-memory accelerator targeting large-language-model workloads is developed using a custom InO_x process design kit, delivering 1.4× to 2.9× speed-up and comparable energy-delay product improvements over 2D baselines. These results establish atomic-layer-deposited InO_x M3D integration as a scalable and complementary metal-oxide-semiconductor-compatible platform for next-generation artificial intelligence hardware and advanced electronics.