Characterization and correction of measurement variations in wafer-embedded multilayer pitch standards

Wafer-level pitch standards play an important role in integrated circuit metrology and instrument calibration. Conventional multilayer film pitch standards offer excellent uniformity and consistency but are too small for wafer-level applications. Embedding them into a wafer enables wafer-level standards, while changes in sample pose during embedding (tilt, yaw, and roll) introduce pitch measurement errors. Conventional single characterization methods remain limited in quantitatively characterizing the three-dimensional orientation of embedded structures. This paper proposes a pose-based pitch correction method using stylus profilometry for tilt and yaw characterization and SEM imaging for roll determination. By measuring the overall pose of the embedded structure with a stylus profiler and combining SEM measurements before and after embedding, a geometric correction model is established to compensate for pose-induced errors in post-embedding pitch measurements. The experimental results show that the pitch measurement deviation increases with yaw angle. After geometric correction, all deviations from the pre-embedding reference values were reduced to below 1 nm, with expanded uncertainties of 1.17-1.34 nm (k=2), demonstrating the effectiveness of the proposed method. This method has the potential to provide a unified correction basis and data support for the pitch calibration of similar embedded structure samples in future studies.