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Published on: April 12, 2018
Van der Waals Hybrid-Gate Reconfigurable Transistor Integrating Floating-Gate Logic and Ferroelectric Synaptic
Hyeonchang Son1, Seungbin Lee1, Sung-Un An1
1School of Electrical Engineering and Computer Science (EECS), Gwangju Institute of Science and Technology (GIST), Gwangju, Republic of Korea.
Abstract:
Reconfigurable field-effect transistors (R-FETs) enable multifunctional hardware in which a single device performs several roles. Conventional R-FETs, however, rely on a single gating mechanism, which forces a trade-off between nonvolatile logic reconfiguration and analog synaptic operation. Here, we report a hybrid-gate R-FET that combines floating-gate (FG) and ferroelectric (FE) operation within a single van der Waals gate stack of MoTe2, h-BN, and In2Se3. In the FG mode, stored charge strongly dopes the ambipolar MoTe2 channel, giving stable reconfiguration among insulating, metallic, n-FET, and p-FET states. On this basis, the device reconfigures into inverter and switch operation and, through circuit-level simulation, into six Boolean logic gates within one layout. In the FE mode, polarization switching modulates the channel conductance at low energy, yielding 6-bit synaptic states over a dynamic range of about 100. A hardware-level spiking neural network built on the experimentally measured synaptic characteristics reaches about 90% accuracy on the MNIST dataset in a MATLAB-based simulation. The hybrid-gate R-FET thus provides a versatile device platform that integrates two distinct gating mechanisms and selectively exploits their respective advantages for reconfigurable logic and neuromorphic computing.
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