Hardware-Native Gaussian Sampling With Probabilistic Ising Machines for Modern Communication Paradigms

Modern communication systems increasingly shift computation to edge devices, where post quantum signing, generative AI and semantic communication must operate under strict energy, latency and memory constraints. A central bottleneck in these workloads is Gaussian sampling. In Falcon class signatures, sampling accounts for about 25% of operations and about 65% of signing time. In diffusion inference, repeated Gaussian injection across denoising steps makes edge deployment costly. Here we show that probabilistic Ising machines provide a hardware native route to random Gaussian distributions with both tunable variance and sampling density with two independent parameters. We compare fully digital field-programmable gate array (FPGA) and FPGA-spintronic implementations with software implementation. At matched sampling precision, the proposed FPGA sampler reduces the dynamic power and logic utilization of the Gaussian-sampling core by approximately 4.0-fold and 4.4-fold, respectively, relative to the isolated Falcon core. A projected ASIC implementation in 28 nm CMOS is estimated to consume approximately 8 mW. Image generation quality quantified with well-established metrics is preserved in an open-source diffusion pipeline. These results establish probabilistic Ising machines as an efficient and scalable platform for Gaussian sampling in post quantum cryptography, edge generative inference and semantic communication.