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A Programmable Delay Line-Based Measurement Methodology for CMOS LiDAR Receivers
Bobin Seo1, Sunkyung Lee1, Somi Park1
1Division of Electronic and Semiconductor Engineering, Ewha Womans University, Seoul 03760, Republic of Korea.
Abstract:
This paper suggests a novel measurement methodology to precisely evaluate the time-of-flight performance of LiDAR receivers (LRx) by using a CMOS programmable delay line-based time-to-voltage converter (PDL-TVC). Conventional LiDAR systems equip an external laser diode and a photodiode connected via bond wires; however, this causes not only severe signal distortions, but also unpredictable signal delays. In contrast, the proposed PDL-TVC employs a rising edge detector (RED) followed by an integrator and a peak-detect-and-hold (PDH) circuit to convert the time intervals into the output voltage pulses for precise distance estimation, thereby omitting the need of a costly LiDAR transmitter and the corresponding bond wires. In addition, a CMOS optoelectronic LiDAR receiver (COLR) is revealed to prove the proposed test methodology for LRx, comprising an on-chip avalanche photodiode to avoid bond wires, as well as an active feedback transimpedance amplifier followed by a Schmitt trigger to generate STOP signals to determine the time intervals from START pulses. Furthermore, a 4-to-10 decoder is added to provide externally selectable delay intervals of 1-10 ns, enabling the controlled test of the PDL-TVC operations. The proposed COLR chip is fabricated in a 180 nm CMOS process, occupying 312 × 659 μm2 for the core area. The PDL-TVC consumes 12 mW, with the programmable delay line consuming 374 µW under a 1.8 V supply. Measured results of the COLR confirms reliable on-chip signal generation and accurate characterization, thus demonstrating that the proposed measurement methodology using the PDL-TVC offers a precise solution for evaluating LiDAR receivers.

