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Updated: Oct 28, 2026

A Standard and Reliable Method to Fabricate Two-Dimensional Nanoelectronics
Published on: August 28, 2018
Process Technologies and Device Applications of Transition Metal Dichalcogenide (TMD)-Based Two-Dimensional
Do Hyeon Lim1, Sooyeon Kim1, Jinsoo Shin1
1School of Integrative Engineering, Chung-Ang University, Seoul 06974, Republic of Korea.
Abstract:
With the continuous miniaturization of semiconductor devices, the limitations of conventional Si-based devices-including short-channel effects, increased leakage current, and elevated power consumption-have become more pronounced, drawing increasing attention to atomically thin two-dimensional (2D) semiconductors as candidate channel materials for next-generation devices. Transition metal dichalcogenides (TMDs) exhibit electronic and optical properties that vary with layer number; in particular, monolayer MoS2 possesses a direct bandgap and excellent electrostatic gate control, making it a promising material for ultrascaled transistors and optoelectronic devices. In this review, we examine the structural and electrical properties of TMDs, focusing on phase engineering for crystal-phase control, semimetal electrodes, and van der Waals contacts for reducing contact resistance at metal/TMD interfaces. We further analyze wafer-scale TMD growth via chemical vapor deposition (CVD) and metal-organic CVD (MOCVD), as well as recent progress in epitaxial growth for controlling grain boundaries and growth orientation. From a device perspective, we review TMD transistors with 1 nm and sub-1 nm physical gate lengths and discuss their extension toward high-frequency devices and three-dimensional integration. These findings demonstrate that TMDs are promising channel materials capable of overcoming the scaling limitations of conventional Si-based semiconductors; however, challenges remain for practical implementation, including large-area material uniformity, contact resistance, defect and interface control, process reproducibility, and compatibility with existing CMOS processes.
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