Pipelined spiking neural network equalizer architecture designed for CMOS implementation in IM/DD optical transmission systems
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Published on: March 20, 2017
Shuangxu Li1, Vincent Scholl2, Georg Böcherer2
1Huawei Technologies Duesseldorf GmbH, Huawei Heisenberg Research Center (Munich), 80992 Munich, Germany.
Abstract:
High-capacity optical communication systems require nonlinear equalization with high throughput and low activity in intensity-modulation/direct-detection (IM/DD) receivers. We propose a pipelined leaky integrate, discharge, and firing (LIDF) spiking neural network (SNN) architecture designed for future CMOS implementation. LIDF separates integration from discharge and firing into two stages and combines reversed receptive field encoding with end-of-time membrane decoding. The behavioral model builds on a previously reported non-leaky two-phase circuit evaluated through SPICE simulations in the SkyWater 130 nm PDK. The synaptic-current and membrane-leakage dynamics introduced here are evaluated behaviorally on the PyTorch/Norse platform. In simulated IM/DD links, LIDF achieves gains of approximately 0.2 dB over a reference SNN equalizer, 0.7 dB over a nonlinear artificial neural network equalizer, and 1.7 dB over a linear equalizer at a pre-FEC bit-error rate of 2 · 10-3. The regularized configuration exhibits up to 91% lower spike activity under simulated conditions, indicating the potential to reduce spike-dependent dynamic energy in an event-driven implementation.
