Inverse design and fabrication of etch lag effect assisted high performance silicon grating couplers

The performance of nanophotonic devices is often limited by discrepancies between ideal design and fabricated structures, especially in the presence of fabrication-induced nonidealities such as etch lag, where the etch depth depends on local feature size. Here, we propose a fabrication-aware inverse design framework that explicitly incorporates process-dependent structural variations into the design loop via an experimentally calibrated mapping between etch depth, feature size, and etch time. Using silicon grating couplers (GCs) as a representative platform, we show that neglecting etch lag leads to spectral shifts and efficiency degradation, while the proposed approach effectively compensates for such effects and improves simulation-experiment agreement. Under a standard 220 nm silicon-on-insulator (SOI) platform with a single shallow-etch process and without back-reflectors, a maximum measured coupling efficiency of 57.7% (≈ -2.39 dB) at 1550 nm is achieved. Tolerance analyses further show that the resulting designs maintain stable performance under the examined fabrication variations and fiber misalignment conditions.