Solid state delay unit for a cardiac arrhythmia monitor

A cheap alternative to tape loop delays has been described which is easy to construct. Although the system described here is for an arrhythmia monitoring system, it can be simply adapted to any device requiring a signal delay. Using 1024 shift registers, a delay of 2 1/2 seconds with a 3 dB signal bandwidth well in excess of 100 Hz is obtained; in theory, this delay and bandwidth combination should be obtained using 512 bit shift registers which would considerably reduce the cost. Full details including a circuit diagram are available on request.