Solid state delay unit for a cardiac arrhythmia monitor

Area of Science:

• Electronics
• Biomedical Engineering
• Signal Processing

Background:

• Traditional tape loop delay systems are expensive and complex.
• There is a need for affordable and simple signal delay solutions in various electronic applications.
• Arrhythmia monitoring systems require reliable signal delay mechanisms.

Purpose of the Study:

• To describe a low-cost, easily constructible alternative to tape loop delays.
• To demonstrate the adaptability of the proposed system for signal delay applications.
• To achieve a specific delay and bandwidth combination for signal processing.

Main Methods:

• Implementation of a signal delay system using 1024-bit shift registers.
• Design and construction of a prototype circuit for signal delay.
• Testing the system's performance for delay duration and signal bandwidth.

Main Results:

• A signal delay of 2.5 seconds was achieved using 1024 shift registers.
• The system demonstrated a 3 dB signal bandwidth exceeding 100 Hz.
• Theoretical analysis suggests using 512-bit shift registers could further reduce costs.

Conclusions:

• The developed shift register-based system provides a cheap and effective alternative to tape loop delays.
• The system is versatile and can be adapted for various applications requiring signal delay.
• Further cost reduction is feasible with optimized shift register configurations.