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Nature Communications|May 16, 2019
Low-voltage high-performance flexible digital and analog circuits based on ultrahigh-purity semiconducting carbon nanotubesTing Lei, Lei-Lai Shao, Yu-Qing Zheng, et al.ACS Nano|April 22, 2025
High-Field Breakdown and Thermal Characterization of Indium Tin Oxide TransistorsHaotian Su, Yuan-Mau Lee, Tara Peña, et al.Nature|August 17, 2022
A compute-in-memory chip based on resistive random-access memoryWeier Wan, Rajkumar Kubendran, Clemens Schaefer, et al.Nature Communications|December 4, 2018
Artificial optic-neural synapse for colored and color-mixed pattern recognitionSeunghwan Seo, Seo-Hyeon Jo, Sungho Kim, et al.Science (New York, N.Y.)|November 16, 2016
MoS2 transistors with 1-nanometer gate lengthsSujay B Desai, Surabhi R Madhvapathy, Angada B Sachid, et al.ACS Nano|August 27, 2016
Distinctive in-Plane Cleavage Behaviors of Two-Dimensional Layered MaterialsYao Guo, Chunru Liu, Qifang Yin, et al.Nanotechnology|April 21, 2016
Disturbance characteristics of half-selected cells in a cross-point resistive switching memory arrayZhe Chen, Haitong Li, Hong-Yu Chen, et al.Nano Letters|February 23, 2026
Gate-Dielectric Engineering with an Ultrathin Silicon Oxide Interfacial Dipole Layer for Low-Leakage Oxide-Semiconductor MemoriesFabia F Athena, Jonathan Hartanto, Matthias Passlack, et al.ACS Nano|September 12, 2022
Statistical Assessment of High-Performance Scaled Double-Gate Transistors from Monolayer WS2Zheng Sun, Chin-Sheng Pang, Peng Wu, et al.Nano Letters|July 25, 2022
Unveiling the Effect of Superlattice Interfaces and Intermixing on Phase Change Memory PerformanceAsir Intisar Khan, Xiangjin Wu, Christopher Perez, et al.Pageof 9