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Thescientificworldjournal|November 12, 2015
An Asynchronous Low Power and High Performance VLSI Architecture for Viterbi Decoder Implemented with Quasi Delay Insensitive TemplatesT Kalavathi Devi, Sakthivel PalaniappanScientific Reports|January 10, 2025
Combination of gray level features with deep transfer learning for copra classification using machine learning and neural networksA Stephen Sagayaraj, T Kalavathi DeviScientific Reports|July 2, 2025
Optimized low power hybrid adder architecture for OFDM in wireless communicationT Kalavathi Devi, E B Priyanka, R Anand, et al.Pageof 1