Jove
Visualize
Contact Us
JoVE
x logofacebook logolinkedin logoyoutube logo
ABOUT JoVE
OverviewLeadershipBlogJoVE Help Center
AUTHORS
Publishing ProcessEditorial BoardScope & PoliciesPeer ReviewFAQSubmit
LIBRARIANS
TestimonialsSubscriptionsAccessResourcesLibrary Advisory BoardFAQ
RESEARCH
JoVE JournalMethods CollectionsJoVE Encyclopedia of ExperimentsArchive
EDUCATION
JoVE CoreJoVE BusinessJoVE Science EducationJoVE Lab ManualFaculty Resource CenterFaculty Site
Terms & Conditions of Use
Privacy Policy
Policies

Alejandro Serrano

1PUBLICATIONS
1CO-AUTHORS
Power electronics
Featured researcher

Get your video featured.

JoVEPublish with JoVE
Featured researcher

Get your video featured.

JoVEPublish with JoVE
Journal

Publications (1)

Sort by Publication Date:
|Nov 16, 2017
A Comparison of FPGA and GPGPU Designs for Bayesian Occupancy Filters.

Luis Medina, Miguel Diez-Ochoa, Raul Correal

Pageof 1

Frequent Collaborators

1 joint publications

Jorge Villagra

Frequent Collaborators

1 joint publications

Jorge Villagra

Top Related Videos

A Novel Bayesian Change-point Algorithm for Genome-wide Analysis of Diverse ChIPseq Data Types
12:39

A Novel Bayesian Change-point Algorithm for Genome-wide Analysis of Diverse ChIPseq Data Types

Published on : Dec 10, 2012

11.7K
See more related videos

Top Related Videos

A Novel Bayesian Change-point Algorithm for Genome-wide Analysis of Diverse ChIPseq Data Types
12:39

A Novel Bayesian Change-point Algorithm for Genome-wide Analysis of Diverse ChIPseq Data Types

Published on : Dec 10, 2012

11.7K
See more related videos