Songtao Chang

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1CO-AUTHORS
Digital processor architectures
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Publications (1)

|Sep 01, 2022
A 4.8 ps root-mean-square resolution time-to-digital converter implemented in a 20 nm Cyclone-10 GX field-programmable gate array.

Xin Yu, Haojie Xia, Weishi Li

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Frequent Collaborators

1 joint publications

Xin Yu