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Yi-Heng Lin

1PUBLICATIONS
5CO-AUTHORS
Digital processor architectures
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Publications (1)

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|Mar 02, 2020
A high resolution time-to-digital-convertor based on a carry-chain and DSP48E1 adders in a 28-nm field-programmable-gate-array.

Xi Qin, Ming-Dong Zhu, Wen-Zhe Zhang

Pageof 1

Frequent Collaborators

1 joint publications

Xi Qin

1 joint publications

Ming-Dong Zhu

1 joint publications

Wen-Zhe Zhang

1 joint publications

Xing Rong

1 joint publications

Jiangfeng Du

Frequent Collaborators

1 joint publications

Xi Qin

1 joint publications

Ming-Dong Zhu

1 joint publications

Wen-Zhe Zhang

1 joint publications

Xing Rong

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