Yi-Heng Lin

1PUBLICATIONS
5CO-AUTHORS
Digital processor architectures
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Publications (1)

|Mar 02, 2020
A high resolution time-to-digital-convertor based on a carry-chain and DSP48E1 adders in a 28-nm field-programmable-gate-array.

Xi Qin, Ming-Dong Zhu, Wen-Zhe Zhang

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Frequent Collaborators

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Xi Qin

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Ming-Dong Zhu

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Wen-Zhe Zhang

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Xing Rong