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Miroslav Ježek

2PUBLICATIONS
4CO-AUTHORS
Digital processor architecturesCircuits and systems
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Publications (2)

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|Dec 02, 2021
Non-blocking programmable delay line with minimal dead time and tens of picoseconds jitter.

Glib Mazin, Aleš Stejskal, Michal Dudka

|May 03, 2018
Arbitrary digital pulse sequence generator with delay-loop timing.

Radim Hošák, Miroslav Ježek

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Frequent Collaborators

1 joint publications

Radim Hošák

1 joint publications

Glib Mazin

1 joint publications

Aleš Stejskal

1 joint publications

Michal Dudka

Frequent Collaborators

1 joint publications

Radim Hošák

1 joint publications

Glib Mazin

1 joint publications

Aleš Stejskal

1 joint publications

Michal Dudka

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