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Diseño energéticamente eficiente de circuitos aritméticos cuaternarios basados en CNTFET
Ajay Rupani1, Deepika Bansal2, Kulbhushan Sharma3
1Department of Electronics and Communication Engineering, Manipal University Jaipur, Jaipur, 303007, India.
Scientific reports
|August 27, 2025
Resumen
Este estudio introduce nuevas puertas lógicas cuaternarias basadas en transistores de efecto de campo de nanotubos de carbono (CNTFET), que reducen significativamente el consumo de energía y mejoran el rendimiento. Estos diseños avanzados ofrecen una solución prometedora para la próxima generación de dispositivos de computación de baja potencia y alta velocidad.
Área de la Ciencia:
- Ingeniería eléctrica
- Ingeniería informática
- Ciencias de los materiales
Sus antecedentes:
- La interconectividad en el diseño de chips aumenta el área y el consumo de energía.
- La lógica de múltiples valores ofrece una solución potencial a estos desafíos.
- Se necesitan nuevas técnicas de diseño para la implementación eficiente de la lógica multivalor.
Objetivo del estudio:
- Diseñar y evaluar puertas lógicas cuaternarias estándar basadas en transistores de efecto de campo de nanotubos de carbono (CNTFET).
- Explorar la lógica del transistor de paso y las técnicas de circuito divisor de tensión para un rendimiento de baja potencia y alta velocidad.
- Demostrar la superioridad de los diseños propuestos sobre los existentes en términos de consumo de energía, PDP y EDP.
Principales métodos:
- Puertas lógicas cuaternarias estándar diseñadas utilizando CNTFET.
- Empleó la lógica del transistor de paso y las técnicas del circuito del divisor de tensión.
- Diseños simulados utilizando HSPICE con un modelo Stanford CNTFET de 32 nm.
- Investigación de la ocupación del área y la robustez mediante diseño y simulaciones de Monte Carlo.
Principales resultados:
- Se consigue un bajo consumo medio de energía (por ejemplo, 31.446 nW para el inversor) y un retraso (por ejemplo, 7.948 ps para el inversor).
- Producto de retraso de potencia (PDP) y producto de retraso de energía (EDP) demostrados superiores en comparación con los diseños existentes.
- Funcionalidad verificada mediante aplicaciones de multiplicador cuaternario (QMUL) y medio multiplicador cuaternario (QHA) con valores PDP competitivos.
Conclusiones:
- Las puertas lógicas cuaternarias propuestas basadas en CNTFET ofrecen mejoras significativas en la eficiencia energética y la velocidad.
- Se espera que la nueva metodología de diseño mejore el rendimiento de los dispositivos informáticos.
- Los diseños muestran robustez y reducción del área superior, lo que los hace adecuados para circuitos integrados avanzados.
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