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Phasor Arithmetics01:13

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Phasors and their corresponding sinusoids are interrelated, offering unique insights into the behavior of alternating current (AC) circuits. One way to understand this relationship is through the operations of differentiation and integration in both the time and phasor domains.
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Accelerators01:17

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Accelerators in concrete serve as admixtures to speed up the hardening process, enabling the concrete to achieve early strength faster. Although accelerators do not necessarily impact the time it takes concrete to set, they reduce this time in practice. A common accelerator is calcium chloride, which is particularly useful for hastening early strength development in cold weather or for rapid repair jobs that require quick heat generation after mixing.
The effectiveness of calcium chloride can...
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Parallel Processing01:20

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The brain processes sensory information rapidly due to parallel processing, which involves sending data across multiple neural pathways at the same time. This method allows the brain to manage various sensory qualities, such as shapes, colors, movements, and locations, all concurrently. For instance, when observing a forest landscape, the brain simultaneously processes the movement of leaves, the shapes of trees, the depth between them, and the various shades of green. This enables a quick and...
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Transdifferentiation, also known as lineage reprogramming, was first discovered by Selman and Kafatos in 1974 in silkmoths. They observed that the moths’ cuticle-producing cells transformed into salt-producing cells. Many such cases of natural transdifferentiation occur in organisms. In humans, pancreatic alpha cells can become beta cells. In newts, the loss of the eye’s lens causes the pigmented epithelial cells to transdifferentiate into the lens cells.
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A clamper circuit, also known as a DC restorer, represents a specialized variant of the rectifier circuit, notable for its method of taking the output across the diode rather than the capacitor. This configuration lends to several distinctive applications, particularly in handling square wave inputs.
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Ampere-Maxwell's Law: Problem-Solving01:17

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A parallel-plate capacitor with capacitance C, whose plates have area A and separation distance d, is connected to a resistor R and a battery of voltage V. The current starts to flow at t = 0. What is the displacement current between the capacitor plates at time t? From the properties of the capacitor, what is the corresponding real current?
To solve the problem, we can use the equations from the analysis of an RC circuit and Maxwell's version of Ampère's law.
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Updated: Sep 9, 2025

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DARTPHROG: Un acelerador homomórfico superescalar

Alexander Magyari1, Yuhua Chen1

  • 1Department of Electrical and Computer Engineering, University of Houston, Houston, TX 77204, USA.

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|August 28, 2025
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El cifrado totalmente homomórfico (FHE) es acelerado por DARTPHROG, una nueva arquitectura superescalar. Este sistema logra acelerar significativamente las operaciones de FHE, mejorando la seguridad de los datos sin comprometer la privacidad.

Palabras clave:
BGV (en inglés)CKKS y sus derivadosPQC y sus derivadoscifrado totalmente homomorfoReducción modularcriptografía postcuánticaseguridad

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Área de la Ciencia:

  • Ciencias de la computación
  • Criptografía
  • Arquitectura de hardware

Sus antecedentes:

  • El cifrado totalmente homomórfico (FHE) permite el intercambio seguro de datos con servidores externos, abordando las violaciones de datos y las preocupaciones de privacidad.
  • Las implementaciones actuales de FHE sufren limitaciones de rendimiento significativas en comparación con la criptografía convencional.

Objetivo del estudio:

  • Introducir DARTPHROG (Dynamic AcceleRaTor for Parallel Homomorphic pROGrams), una nueva arquitectura diseñada para acelerar las operaciones FHE.
  • Evaluar el rendimiento y la eficiencia de DARTPHROG, en particular sus capacidades superescalares y el nuevo sistema de reducción modular optimizada por hardware (HOM-R).

Principales métodos:

  • Diseñado DARTPHROG, una arquitectura superescalar que permite la ejecución paralela de operaciones homomórficas.
  • Integró el sistema de reducción modular optimizada por hardware (HOM-R), comparando su eficiencia con la reducción de Barrett y Montgomery.
  • Implementó un ensamblador, un conjunto de instrucciones basado en THUMB y un procesador homomórfico en un FPGA.
  • Evaluación superescalar realizada de operaciones homomórficas excluyendo la Transformación Teórica de Números (NTT).

Principales resultados:

  • Se han logrado aceleraciones de hasta 1860x para operaciones FHE primitivas (adición, resta, multiplicación) a través de la ejecución en paralelo.
  • DARTPHROG funciona con un bajo consumo de energía de 40,5 W, posicionándolo como una arquitectura de aceleración FHE compacta.
  • Demostró la eficiencia del sistema HOM-R en comparación con los métodos tradicionales de reducción.

Conclusiones:

  • DARTPHROG ofrece un avance significativo en la aceleración FHE a través de su diseño superescalar y componentes de hardware eficientes.
  • La arquitectura proporciona una valiosa línea de base para evaluar el impacto de la NTT en los sistemas FHE.
  • Presenta un camino hacia implementaciones de FHE más prácticas y eficientes para mejorar la seguridad de los datos.