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Disipación térmica mejorada en superficie en arreglos de memoria resistiva vertical 3D con transistores selectores

Arman Kadyrov1, Seunghyun Lee1, Batyrbek Alimkhanuly1

  • 1Department of Electronic Engineering, Kyung Hee University, Yongin 17104, Republic of Korea. seansl@khu.ac.kr.

Nanoscale horizons
|January 22, 2026
PubMed
Resumen

La posición óptima de los transistores selectores en la memoria resistiva 3D (RRAM) reduce la acumulación de calor en los aceleradores de IA. Esta gestión térmica mejora la eficiencia energética y la fiabilidad de los arreglos de memoria apilados.

Palabras clave:
gestión térmicamemoria resistivaRRAM 3Dtransistores selectoresaceleradores de IAeficiencia energéticafiabilidad

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