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Un algoritmo de aprendizaje adaptativo al hardware para la memoria asociativa de capacidad superlineal en barras
Chengping He1,2, Mingrui Jiang1,2, Keyi Shan1,2
1Department of Electrical and Electronic Engineering, The University of Hong Kong, Hong Kong SAR, China.
Nature communications
|February 23, 2026
Resumen
Los investigadores desarrollaron un nuevo algoritmo para las redes neuronales de Hopfield, mejorando la recuperación de la memoria asociativa en el hardware del memristor. Este enfoque aumenta la capacidad y la tolerancia a los defectos para un reconocimiento eficiente de patrones.
Área de la Ciencia:
- La ingeniería neuromórfica es una ingeniería neuromórfica.
- La inteligencia artificial es inteligencia artificial.
- Ciencia de los materiales Ciencia de los materiales.
Sus antecedentes:
- La memoria asociativa humana recuerda patrones a partir de señales parciales.
- Las redes neuronales de Hopfield emulan esto, pero se enfrentan a ineficiencias de hardware y limitaciones de dispositivos.
- Las implementaciones de memristor existentes luchan con los defectos y la capacidad de patrón continuo.
Objetivo del estudio:
- Desarrollar un algoritmo de aprendizaje adaptativo al hardware para las redes neuronales de Hopfield.
- Para mejorar la tolerancia a los defectos y la capacidad efectiva en la memoria asociativa basada en memristor.
- Para permitir la recuperación eficiente de patrones de valor binario y continuo en las plataformas de computación en memoria.
Principales métodos:
- Introdujo un algoritmo de aprendizaje adaptativo al hardware que incorpora las restricciones del dispositivo durante la capacitación.
- Validación del algoritmo en una plataforma de cómputo en memoria integrada de memristor y barra cruzada.
- Extendió el marco a arquitecturas escalables multicapa para patrones binarios y continuos.
Principales resultados:
- Logró una capacidad tres veces mayor que una línea de base pseudo-inversa en un 50% de fallas atascadas.
- Observado escalamiento de capacidad superlineal (N^1.49 para binario, N^1.74 para continuo) en datos correlacionados.
- Reducción de energía en 8.8× y latencia en 99.7% utilizando paralelismo de barra cruzada y actualizaciones sincrónicas.
Conclusiones:
- El algoritmo desarrollado ofrece una mejor tolerancia a los defectos y una capacidad efectiva para las redes Hopfield basadas en memristores.
- Las arquitecturas multicapa escalables demuestran una escala de capacidad superlineal para el recuerdo asociativo.
- Este algoritmo-hardware co-diseño proporciona una solución práctica para la memoria asociativa robusta y eficiente.
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