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QCAベースのデジタルシステムのためのD・ラッチとD・フリップフラップの新規で最適化された設計
Pezhman Kiani Vosta1, Mohammad Gholami2
1Department of Electrical Engineering, Faculty of Electrical and Computer Engineering, Babol Noshirvani University of Technology, Babol, Iran.
Scientific reports
|August 22, 2025
まとめ
この研究では,DラッチとDフリップフロップのための新しい量子ドットセルラーオートマ (QCA) デザインを導入し,ナノスケールの効率的なデジタルシステムのための細胞数と面積を大幅に削減します.
科学分野:
- 量子電子
- ナノスケールのデジタルシステム
- 量子ドットセルラーオートマット (QCA) 技術
背景:
- QCA回路は,細胞数,面積効率,および遅延で課題に直面しています.
- 既存のQCA設計は,実用的なアプリケーションのために最適化する必要があります.
研究 の 目的:
- QCA技術を用いた新しい,コンパクトなDラッチとDフリップフラップの設計を提案する.
- QCA回路の細胞数,面積,および遅延の観点から効率を高める.
- 提案された設計に基づいてコンパクトな4ビットシフトレジスタを開発する.
主な方法:
- QCAベースの新しいDラッチとDフリップフロップ回路の設計とシミュレーション.
- すべてのシミュレーションに QCA Designer バージョン 2.0.3 を使用しています.
- サーキットの実装のための確立されたQCA設計原則の遵守.
主要な成果:
- 提案されたDフリップフロップは28個のセルを使用し,0.02μm2を占有し,0.5クロックサイクルの遅延があります.
- 提案されたD-ラッチは18個のセルを使用し,0.01μm2を占有し,比較可能な遅延があります.
- 細胞数 (最大44. 5%) と面積 (最大60%) は,以前の設計と比較して大幅に減少した.
結論:
- 開発されたQCA D-ラッチとDフリップフラップのデザインは,コンパクト性と効率性を向上させます.
- これらの設計は,QCA技術における低電力,高密度回路の実装の可能性を示しています.
- この研究は,QCAベースのナノスケールデジタルシステムの進歩に貢献します.
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