p型二次元電界効果トランジスタにおける低接触抵抗達成のための相補的ドーピング戦略
Mayukh Das1, Krishnendu Mukhopadhyay1, Md Sajjad Alam2
1Engineering Science and Mechanics, Penn State University, University Park, Pennsylvania 16802, United States.
Nano letters
|December 21, 2025
まとめ
研究者らは、相補的ドーピングとファンデルワールス界面を使用して、p型二次元(2D)電界効果トランジスタ(FET)の接触抵抗を低減しました。この進歩により、論理回路の2D FET性能が向上します。
科学分野:
- 材料科学
- ナノテクノロジー
- 半導体物理学
背景:
- 高性能相補型論理回路には、二次元(2D)電界効果トランジスタ(FET)における低接触抵抗(R_C)が必要です。
- n型トランジスタとは異なり、p型2D FETで低R_Cを達成することは、ホール注入における大きなショットキー障壁のため困難です。
研究 の 目的:
- p型単層WSe2 FETのR_CをサブkΩ·μm範囲に低減すること。
- 効率的なホール注入のために、接触領域とチャネル領域の両方をエンジニアリングすること。
- n型およびp型2Dトランジスタ間の性能ギャップを狭めること。
主な方法:
- MOCVD成長WSe2チャネルに積層されたp型接触材料として、縮退Taドープ多層MoSe2を利用しました。
- Se空孔サイトへのNO化学吸着による選択的チャネルドーピングのために、作製後のNOアニールを採用しました。
- 相補的ドーピングとクリーンな2D/2Dファンデルワールス(vdW)界面を組み合わせました。
主要な成果:
- p型単層WSe2 FETでサブkΩ·μm範囲のR_Cを達成しました。
- 最大53μA/μmの高いON電流(I_ON)値を実現する効率的なホール注入を実証しました。
- TaドープMoSe2の接触特性を維持しながら、WSe2チャネルをドーピングしました。
結論:
- 提示された戦略は、接触およびチャネルエンジニアリングを組み合わせて、p型2D FETのR_Cを効果的に低減します。
- このアプローチは、相補型2D論理技術の開発を大幅に進歩させます。
- この方法は、n型およびp型2Dトランジスタのバランスの取れた性能への道を提供します。
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