高性能・低消費電力ロジックアプリケーション向けIn₂Se₃-グラフェンvdW強誘電体ヘテロ接合に基づく電界効果トランジスタ

In recent years, two-dimensional (2D) ferroelectric materials have garnered significant attention for their applications in non-volatile memory devices due to their ferroelectricity. However, systematic research on the transport mechanisms at ferroelectric polarization modulation interfaces and their applications in logic devices remains limited. In this study, a 2D ferroelectric heterojunction FET (FeHJ-FET) based on an In₂Se₃/graphene (Gr) vdW ferroelectric heterojunction is proposed. We reveal the potential of α-In₂Se₃ as a semiconductor in 5 nm 2D FETs using density-functional theory (DFT) combined with the non-equilibrium Green's function (NEGF) method. A Nonvolatile modulation of the interface Schottky barrier height (SBH) is realized by reversing the polarization direction of α-In₂Se₃, achieving an Ohmic contact. Moreover, by introducing the underlap structure and lowering the bias voltage, an FeHJ-FET with a heterojunction of polarization-down In₂Se₃ and Gr (In₂Se₃↓/Gr) exhibits excellent on-state current, meeting the requirements of high-performance (HP) and low-power (LP) applications of the International Roadmap for Devices and Systems (IRDS) 2034. Meanwhile, an In₂Se₃↓/Gr FeHJ-FET with an underlap length of 1.2 nm (L_UL = 1.2 nm) exhibits a current value of 1396.30 µA µm^-1, an ON/OFF ratio of 10⁷, and a subthreshold swing that breaks the Boltzmann limit. These results establish that α-In₂Se₃ is a viable channel material for HP/LP logic FETs within the conventional 2D semiconductor paradigm. Furthermore, they provide a theoretical foundation for engineering vdW ferroelectric heterojunction transistors featuring electrostatically reconfigurable interfacial properties.