开发和分析一个三端三合体Q-FinFET用于一个3纳米技术节点与一个应力道系统的发展和分析
Swagat Nanda1, Rudra Sankar Dhar1, Falah Awwad2
1Department of Electronics and Communication Engineering, National Institute of Technology Mizoram, Chaltlang, Aizawl 796012, Mizoram, India.
Nanomaterials (Basel, Switzerland)
|May 27, 2023
概括
研究人员使用应力开发了三量子FinFET,以克服先进纳米电子设备中的短通道效应. 这一创新提高了未来纳米级以下集成电路更快切换操作的性能.
科学领域:
- 半导体设备物理学 半导体设备物理
- 纳米电子技术纳米电子技术
- 材料科学 是一种材料科学.
背景情况:
- 多门场效应晶体管 (FET) 面临14nm以下的短通道效应 (SCE),阻碍了纳米FET缩放和集成电路 (IC) 技术的进步.
- 现有的FinFET由于SCE和边缘容量导致性能下降,影响了半导体行业的进步.
- 目前的研究正在努力满足国际设备和系统路线图 (IRDS) 对先进IC的要求.
研究的目的:
- 开发使用三层应变通道的新型三三 (TG) 量子 (Q) -FinFET.
- 为了增强ON电流,管理泄漏电流,并改进SCEs用于下一代IC技术.
- 通过解决当前纳米FETs的局限性,使半导体行业的持续进展成为可能.
主要方法:
- 在10nm和8nm通道长度处部署三TG量子 (Q) -FinFET.
- 用于设计验证的门电压的分析计算.
- 与现有设备和IRDS标准相比,对电气参数和量子效应的探索和分析.
主要成果:
- 通过使用具有相同尺寸 (8 nm 门长) 的三个来显著增加驱动电流.
- 与IRDS 2022 3nm技术节点设备相比,实现了增强的性能.
- 在拟议的设备中,在可接受的范围内保持短通道效应.
结论:
- 开发的具有三层应变通道的三Q-FinFET是巩固设备性能的一种可行的技术.
- 这种方法使未来一代的设备能够在亚纳米模式下更快地进行切换操作.
- 该研究为克服扩展局限性和推进IC技术提供了一条途径.
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