基于高性能极双门 WSe2薄膜晶体管的级联逻辑门
Xintong Li1, Peng Zhou2, Xuan Hu2
1Department of Electrical and Computer Engineering, The University of Texas at Austin, Austin, Texas 78712, United States.
ACS nano
|June 28, 2023
概括
研究人员开发了 tungsten diselenide (WSe2) 双极双门晶体管用于可重新配置的逻辑电路. 这些晶体管提供低功耗和高性能,使先进的电子设计.
科学领域:
- 材料科学 材料科学 材料科学
- 纳米技术 纳米技术
- 电子工程 电子工程
背景情况:
- 与传统的CMOS相比,使用低维材料的两极双门晶体管提供了可重新配置的逻辑,并减少了离位电流.
- 关键的挑战包括这些先进的逻辑门的级联性和功耗.
- 二化 (WSe2) 是制造高性能双极晶体管的一种有前途的材料.
研究的目的:
- 制造和描述基于WSe2.2的高性能双极双门晶体管.
- 用这些晶体管来证明使用这些晶体管的可循环和级联逻辑门的可行性,而使用最小的静电消耗.
- 分析V_T-drop电路和速度性能的行为,噪声边缘和潜力.
主要方法:
- 使用 tungsten diselenide (WSe2) 制造两极双门晶体管.
- 晶体管性能的表征,包括开启关闭比率,关闭电流,歇斯底里和下值波动.
- 对各种逻辑门 (逆变器,XOR,NAND,NOR,缓冲器) 和V_T-drop电路的演示和分析.
- 研究控制门和极性门的行为,以及噪声边缘分析.
主要成果:
- 在WSe2晶体管中实现了高开关比 (10^8和10^6) 和低离位电流 (100-300 fA).
- 在p型和n型运输中证明了微不足道的歇斯底里和理想的下值波动 (62-63mV/dec).
- 成功实现了级联逻辑门,使用最小的静电消耗.
- 分析了噪声边缘,使V_T-drop电路能够实现简化设计和减少晶体管数量.
结论:
- 双极双门晶体管WSe2表现出优异的性能特性,适合于先进的逻辑电路.
- 这些晶体管可以创建灵活的,低功耗的,高速的逻辑电路,并有可能实现V_T-drop.
- 该研究强调了基于WSe2的晶体管在下一代电子产品中的巨大潜力.
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