硬件木马缓解技术在芯片上的网络 (NoC) 中
Musharraf Hussain1, Naveed Khan Baloach2, Gauhar Ali3
1Faculty of Computer Science, The University of Lahore, Islamabad Campus, Islamabad 44000, Pakistan.
Micromachines
|July 8, 2023
概括
本研究介绍了一种新的方法,用于防止网络芯片 (NoC) 设计中的硬件木马 (HTs). 该技术增强了flitt完整性和动态排列,改善了数据包接收,减少了对恶意修改的延迟.
科学领域:
- 计算机工程 计算机工程
- 网络安全 网络安全
- 集成电路设计 集成电路设计
背景情况:
- 半导体行业的全球化增加了集成电路中硬件木马 (HT) 的风险.
- 现有的HT检测和缓解方法对于芯片上的网络 (NoC) 架构是不够的.
- 硬件木马对芯片安全构成重大威胁,原因是潜在的恶意修改.
研究的目的:
- 提出一项针对硬件木马的协作对策,专门针对芯片上的网络设计.
- 提高NoC路由器的安全性,防止不忠诚的员工或第三方供应商恶意修改.
- 为了防止未经授权的改变网络芯片硬件设计.
主要方法:
- 实施反制措施以确保网络在芯片上的硬件设计.
- 使用一种协作方法,涉及飞完整性和动态飞排列.
- 消除插入NoC路由器中的硬件木马.
主要成果:
- 与现有技术相比,拟议的方法可将接收的数据包数量增加高达10%.
- 在飞机的头部,尾部和目的地字段中插入的硬件木马的平均延迟时间分别降低了14.7%,8%和3%.
- 有效地从NoC路由器中消除硬件木马.
结论:
- 拟议的协作方法提供了一个强大的解决方案,用于保护网络在芯片上的设计免受硬件木马的攻击.
- 这种方法显著提高了数据包接收率,并减少了HTs存在时的延迟.
- 该技术为NoC硬件提供了针对内部和外部威胁的增强安全性.
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