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Updated: Jul 23, 2025

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新的系统阵列算法和VLSI架构用于1D MDST.

Doru Florin Chiper^1,2,3, Arcadie Cracan¹

¹Faculty of Electronics, Telecommunications and Information Technology, "Gheorghe Asachi" Technical University of Iasi, 700506 Iasi, Romania.

Sensors (Basel, Switzerland)

|July 14, 2023

概括

本文介绍了两个系统阵列算法,用于高效的非常大规模集成 (VLSI) 实现1D修改离散正弦转换 (MDST). 这些算法简化了硬件复杂性,并提供高速,低成本的VLSI设计.

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科学领域:

数字信号处理数字信号处理
集成电路设计集成电路设计
计算机架构计算机架构

背景情况:

一维修改离散正弦转换 (MDST) 在各种信号处理应用中至关重要.
高效的非常大规模集成 (VLSI) 实现对于高性能硬件至关重要.
现有的MDST系统阵列方法可能会面临硬件复杂性和效率方面的挑战.

研究的目的:

为高效的VLSI实现1D MDST开发新的缩阵列算法.
为了减少硬件复杂性,并提高VLSI中MDST计算的效率.
为了优化硬件设计,利用模块化和常规计算结构.

主要方法:

1D MDST的分解成伪循环相关性和伪循环卷积.
基于这些结构设计了两个不同的缩阵列算法.
开发用于硬件共享的共同计算结构.
在第二个算法中优化乘数以进一步降低复杂性.

主要成果:

拟议的算法使得1D MDST的高效VLSI实现成为可能.
通过使用共享的线性缩阵列,硬件复杂性大大降低.
第二个算法通过常数乘法器进一步降低了复杂性.

关键词:

硬件安全硬件安全硬件安全修改后的离散正弦转换这是一种模糊化技术.伪循环的相关性假循环的相关性.伪循环的卷积卷积.缩阵列是一个系统阵列.

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由此产生的架构表现出高速并发,高效的VLSI利用,以及低的I/O成本.

结论:

本文所介绍的缩阵列算法为基于VLSI的1D MDST提供了高效且具有成本效益的解决方案.
模块化分解和架构优化导致硬件复杂性降低和性能提高.
这些架构适用于高速应用程序,并提供了通过模糊技术实现安全实现的潜力.