一个超低功率的模拟乘法除法器兼容数字代码,用于基于RRAM的内存计算宏.
Yiming Yang1, Shidong Lv1, Xiaoran Li1,2
1School of Integrated Circuits and Electronics, Beijing Institute of Technology, Beijing 100081, China.
Micromachines
|July 29, 2023
概括
这项研究介绍了一种超低功率的模拟乘法除法器,用于电阻式随机存取内存 (RRAM) 计算内存 (CIM). 这种高效的电路提高了操作能力,并降低了边缘计算设备的功耗.
科学领域:
- 集成电路 集成电路
- 计算机工程 计算机工程
- 材料科学 材料科学 材料科学
背景情况:
- 当前的乘法和除法方法通常面临功耗和电路复杂性的限制.
- 基于电阻随机存储器 (RRAM) 的内存计算 (CIM) 宏需要高效的算术操作来提高性能.
- 与数字对应器相比,模拟分隔器在降低功耗和更简单的结构上提供了优势,用于较低精度的任务.
研究的目的:
- 为了呈现一个超低功率的模拟乘法器-分割器电路.
- 为了使基于RRAM的CIM宏与数字代码单词的兼容性.
- 在计算任务中提高能源效率.
主要方法:
- 使用55nmCMOS工艺设计和制造一个模拟乘法分法器.
- 实现一个基于当前镜像的结构来进行乘法和除法.
- 评价电路的性能,包括精度,速度,带宽和功耗.
主要成果:
- 实现了模拟电流乘法和除法的8位精度.
- 对于8位操作,证明信号延迟为1μs.
- 测量带宽为1.4MHz,功耗低于6.15μW,供应电压为1.2V.
结论:
- 拟议的乘法除法器提高了运行能力,同时降低了电力消耗和复杂性.
- 该电路适合集成到基于RRAM的CIM宏.
- 它为边缘计算设备的实时操作提供了巨大的潜力.
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