一个宽带真实时间延迟电路使用0.25μm的GaN HEMT技术.
Jeong-Geun Kim1, Donghyun Baek2
1Department of Electronic Engineering, Kwangwoon University, Seoul 01897, Republic of Korea.
Sensors (Basel, Switzerland)
|August 12, 2023
概括
这项研究介绍了一种使用化高电子移动性晶体管 (GaN HEMT) 技术制造的新型4位真实时间延迟集成电路 (IC),可实现宽带性能的无束式相位阵列天线.
科学领域:
- 电气工程 电气工程
- 材料科学 材料科学 材料科学
- 天线技术天线技术
背景情况:
- 阶段式阵列天线需要精确的信号定时来实现光束方向.
- 束,一个依赖频率的束偏差,降低了天线性能.
- 化 (GaN) 高电子移动性晶体管 (HEMT) 技术提供了高频和高功率的优势.
研究的目的:
- 为了呈现一个宽带的4位真实时间延迟集成电路 (IC) 无光束斜的分相阵列天线.
- 为了证明使用GaN HEMT技术用于真实时间延迟应用的可行性.
- 为了实现紧的芯片大小和高性能.
主要方法:
- 使用双极双抛 (DPDT) 和单极单抛 (SPDT) 交换机实现交换路径电路拓.
- 使用紧LC (CLC) π网络,用于延迟线路的一次性元素.
- 在印刷电路板 (PCB) 上集成负电压发生器和SPI控制器.由于GaN技术的局限性.
主要成果:
- 在DC-6 GHz带宽上实现了最大时间延迟~182秒,分辨率为10.5秒.
- 证明的根平均平方 (RMS) 时间延迟和幅度误差分别低于5ps和0.6dB.
- 测量的插入损失<6.8dB,返回损失>10dB,以及接近零的电流消耗.
结论:
- 这项工作代表了使用GaN HEMT技术的真正时间延迟IC的首次演示.
- 开发的IC有效地减轻了阶段阵列天线中的光束眼.
- 基于GaN HEMT的真实时间延迟IC为先进的天线系统提供了一个有前途的解决方案.
相关概念视频
Biasing of FET
310
Biasing a Junction Field Effect Transistor (JFET) is crucial for setting operational parameters and ensuring efficient functioning in electronic circuits. JFETs are characterized by using a single carrier type in N-channel or P-channel configurations, where the channel is surrounded by PN junctions. These junctions are central to the device's ability to control current flow.
In an N-channel JFET, the structure consists of N-type material forming the channel on a P-type substrate, with the...
In an N-channel JFET, the structure consists of N-type material forming the channel on a P-type substrate, with the...
310
Cut-off Frequency of BJT
751
Cut-off frequencies in Bipolar Junction Transistors (BJTs) mark the transition between the signal's pass band and stop band, influencing their performance in amplifying or attenuating frequencies. These frequencies are crucial for designing BJTs to meet specific operational requirements in electronic circuits.
Alpha Cut-Off Frequency: Pertinent to the common-base configuration, the alpha cut-off frequency defines the upper-frequency limit at which the current gain, alpha, remains stable. As...
Alpha Cut-Off Frequency: Pertinent to the common-base configuration, the alpha cut-off frequency defines the upper-frequency limit at which the current gain, alpha, remains stable. As...
751
Biasing of Metal-Semiconductor Junctions
281
Biasing metal-semiconductor junctions involves applying a voltage across the junction. Specifically, the metal is connected to a voltage source, while the semiconductor is grounded. This technique is essential for controlling the direction and magnitude of current flow in electronic devices, including diodes, transistors, and photovoltaic cells.
In Schottky junctions, where the semiconductor is n-type, applying a positive voltage to the metal relative to the semiconductor reduces its Fermi...
In Schottky junctions, where the semiconductor is n-type, applying a positive voltage to the metal relative to the semiconductor reduces its Fermi...
281
MOSFET Amplifiers
186
The MOSFET, when operating in its active region, functions as a voltage-controlled current source. In this region, the gate-to-source voltage controls the drain current. This principle underlies the operation of the transconductance MOSFET amplifier. The output current is directed through a load resistor to convert this amplifier into a voltage amplifier. The output voltage is then obtained by subtracting the voltage drop across the load resistance from the supply voltage. This process results...
186
Time and frequency -Domain Interpretation of Phase-lead Control
103
Phase-lead controllers are commonly used in various control systems to enhance response speed and stability. Adjusting the brightness on a television screen offers a practical example of phase-lead control. When contrast is enhanced, a phase-lead controller is employed. Mathematically, phase-lead control is identified when the first parameter is smaller than the second.
The design of phase-lead control involves the strategic placement of poles and zeros to balance steady-state error and system...
The design of phase-lead control involves the strategic placement of poles and zeros to balance steady-state error and system...
103


