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动态可扩展的NoC架构,用于实现运行时可重新配置的应用程序
Qaiser Ijaz1,2, Hiliwi Leake Kidane1, El-Bay Bourennane1
1ImViA Laboratory, University of Burgundy, 21000 Dijon, France.
Micromachines
|October 28, 2023
概括
本研究介绍了两个新的动态可扩展的芯片上的网络 (NoC) 架构,用于可重新配置的知识产权 (IP),以减少功耗. 与静态设计相比,这些可扩展的NoC可以显著节省电力.
科学领域:
- 计算机工程 计算机工程
- 硬件架构 硬件架构
- 低功耗设计 低功耗设计
背景情况:
- 传统的芯片上的网络 (NoC) 架构往往缺乏灵活性来实现动态重新配置的知识产权 (IP).
- 当IP需求波动时,静态NoC设计可能会导致低于最佳的功耗.
- 在现场可编程门数组 (FPGA) 中有效的资源共享对于现代嵌入式系统至关重要.
研究的目的:
- 为可重新配置的IPs提出和评估两个新的动态可扩展的NoC架构.
- 通过运行时可扩展性来证明显著的功率减少.
- 开发一个控制经理,以优化重新配置成本和资源利用.
主要方法:
- 开发一个运行时可扩展的基于列的NoC架构.
- 扩展到第二个架构,对行和列进行动态缩放.
- 在Virtex 6 FPGA (ML605板) 上实现和测试原型.
- 对IP和NoC子重新配置的控制管理器的设计.
主要成果:
- 与静态架构相比,动态可扩展的NoC架构可以实现显著的功耗减少.
- 拟议的架构有效地管理基于IP连接需求的运行时间扩展.
- 原型验证了可扩展的NoC设计的可行性和性能.
结论:
- 动态可扩展的NoC在具有可重新配置IP的系统中非常有效地节省电力.
- 拟议的架构为FPGAs的资源共享提供了灵活和高效的解决方案.
- 这种方法有利于在自适应计算环境中优化功率和资源利用.
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